Hitherto, various hetero-junction field effect transistors (HFETs) operated in a normally-off mode have been advised for power device use. FIG. 1 is a cross-sectional side view illustrating the configuration of a conventional HFET 10P disclosed in Japanese Unexamined Patent Application Publication No. 2005-183733.
A buffer layer 30P made of GaN is deposited on a surface of a base substrate 20P made of sapphire or the like. An electron travel layer 40P made of undoped GaN is deposited on a surface of the buffer layer 30P. A barrier layer 50P made of undoped AlGaN is deposited on a surface of the electron travel layer 40P. Undoped GaN in the electron travel layer 40P and undoped AlGaN in the barrier layer 50P form a hetero-junction.
A source electrode 900S and a drain electrode 900D are placed on a surface of the barrier layer 50P so as to be apart from each other at a predetermined distance. A gate electrode 900G is placed on a surface of the barrier layer 50P so as to be located between the source electrode 900S and the drain electrode 900D and is spaced from the source electrode 900S and the drain electrode 900D.
The barrier layer 50P has a thin film region 500P which is thinner than other regions and which is located directly under the gate electrode 900G. The presence of the thin film region 500P realizes a so-called normally-off mode in which no current flows between the source electrode 900S and the drain electrode 900D when no voltage is applied to the gate electrode 900G.
FIG. 2 is a cross-sectional side view illustrating the configuration of a conventional HFET 10Q disclosed in Japanese Unexamined Patent Application Publication No. 2009-170546.
An AlN layer 32Q and a buffer layer 30Q are deposited on a surface of a base substrate 20Q in that order. The buffer layer 30Q is composed of GaN and AlGaN. A channel layer 60Q composed of p-GaN is deposited on a surface of the buffer layer 30Q. The term “p-GaN” refers to p-type doped GaN. An electron travel layer 40Q made of undoped GaN is deposited on a surface of the channel layer 60Q. An n-type doped AlGaN layer 51Q is deposited on a surface of the electron travel layer 40Q. A source electrode 900S and a drain electrode 900D are placed on a surface of the n-type doped AlGaN layer 51Q so as to be apart from each other at a predetermined distance. A gate electrode 900G is placed on a surface of the n-type doped AlGaN layer 51Q so as to be located between the source electrode 900S and the drain electrode 900D and is spaced from the source electrode 900S and the drain electrode 900D. A region located directly under the gate electrode 900G has a hole extending through the n-type doped AlGaN layer 51Q and the electron travel layer 40Q in a stacking direction. An insulating layer 70Q is placed over the wall of the hole and a surface of the n-type doped AlGaN layer 51Q. The gate electrode 900G has a height sufficient to fill the hole covered with the insulating layer 70Q. This allows a recessed structure 700Q in which the n-type doped AlGaN layer 51Q and the electron travel layer 40Q are partitioned to be formed directly under the gate electrode 900G. The presence of the recessed structure 700Q realizes a normally-off mode by making use of depletion due to p-GaN.